Data Study: Impact of Temperature on Charge Plasma Technique (CPT) based Junction less (JL)- cylindrical surrounding gate (CSG) MOSFET

Published: 8 October 2021| Version 1 | DOI: 10.17632/57y58w97c7.1


In the present paper, A charge plasma technique-based junction-less cylindrical surrounding gate (CPT-JL-CSG) MOSFET has been investigated to check the electrical and analog performance at different temperatures. There is no physical junction at source to channel and channel to drain interface as the whole silicon pillar has uniform doping and is designed by keeping the work function of metal lower than that of the source and drain. This made the fabrication of the device easier than that of a conventional cylindrical surrounding gate (CSG) MOSFET. In the paper, the electrical /analog characteristics have been extensively investigated using numerical simulation at different temperatures. The ATLAS-3D device simulator is used for numerical simulation and data collection purposes. The results show that the analog performance reduced with an increase in the temperature due to the lower ION/IOFF ratio and increased delay time


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• The data provided in this paper will be valuable information to enhance the performance of CPT-based CSG MOSFET in related environments. • The data extracted will be of immense benefit to researchers in the field of VLSI Design, especially for MOSFET analysis. • The key performance indicators (KPI) analysis and accurate thermal planning can be done using the provided data. • The parameters for which the device has been investigated at different temperatures will support further insights towards the development of experimental procedures to accelerate research in VLSI Engineering


Dr A P J Abdul Kalam Technical University


Metal-Oxide-Semiconductor Field-Effect Transistor