Constant-Time FPGA Implementation of a Gaussian Blur Filter Using a Bit-Serial SIMD Architecture

Name: Constant-Time FPGA Implementation of a Gaussian Blur Filter Using a Bit-Serial SIMD Architecture
Creator: Joe Kareh
Published: 2026-07-30T08:41:45.759Z
Keywords: Computer Engineering

Kareh, Joe

doi:10.17632/jp9rw2886v.1

Constant-Time FPGA Implementation of a Gaussian Blur Filter Using a Bit-Serial SIMD Architecture

Published: 30 July 2026| Version 1 | DOI: 10.17632/jp9rw2886v.1

Contributor:

Joe Kareh

Description

HDL source code, testbenches and synthesis results for a bit-serial SIMD Gaussian blur filter implemented on FPGA

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Institutions

University of Balamand
Liban-Nord, Tripoli

Constant-Time FPGA Implementation of a Gaussian Blur Filter Using a Bit-Serial SIMD Architecture

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