Layout design and simulation of quantum dot cellular automata 7-bit binary to BCD parallel converter
Description
The converter is intended for decimal digit multipliers implementation on quantum dot cellular automata (QCA). Because there are no published QCA 7-bit binary to BCD converters, such parallel converter based on most efficient “shift-add by constant” architecture [1] has been designed. The QCA layout of the converter is shown in Fig. 1 (File 1). The converter is built on four conditional adder blocks. Each block is implemented using logic gates NOT, OR2, AND2, XOR2 [2] and MUX 2-to-1 [3]. It has 7-bit binary product (BPR) inputs: P6, P5, P4, P3, P2, P1, P0 and 8-bit outputs: H3, H2, H1, H0, and L3, L2, L1, L0 (DPH - decimal product high digit and DPL – decimal product low digit). The functional units are marked by a dash line. The number of cells is 2222, required area is 4.25 µm2, number of irreversible logic gates and multiplexers is 40, number of inverters is 4, and number of multilayer crossovers is 34. The QCADesigner [4], version 2.0.3 was used for the converter simulation by the bistable simulation engine. All default parameters were used, except the number of samples, which was 88,000. All 37 possible input binary products were verified. The simulation results for 10 product values are represented in Fig. 2 (File 2). The latency (propagation delay) of this converter is 11 CLK. References [1] S. R. Rangisetti, A. Joshi, and T. Nikoubin, Area-efficient and power-efficient binary to BCD converters, 2015 6th International Conference on Computing, Communication and Networking Technologies (ICCCNT), Dallas-Fortworth, TX, USA, 2015, pp. 1-7, doi: 10.1109/ICCCNT.2015.7395189. [2] N. Safoev, J.S. Lee, J.C. Jeon, QCA XOR gate for arithmetic and logic circuit design, Proceed. 103rd IIER Int. Conf. (2017) 8-11. [3] M.N. Asfestani, S.R. Heikalabad, A unique structure for the multiplexer in quantum-dot cellular automata to create a revolution in design of nanostructures, Physica B 512 (2017) 91–99. [4] K. Walus, G.A. Jullien, Design tools for an emerging SoC technology: quantum-dot cellular automata, Proc. IEEE 94 (6) (2006) 1225-1244.