Data for: Quantification of the likelihood of single event multiple transients in logic circuits in bulk CMOS technology

Published: 4 Jan 2018 | Version 1 | DOI: 10.17632/yx9npcvnw8.1
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Description of this data

This repository contains the device simulation raw data of 65nm planar transistors (2D and 3D) : device command files simulation template and csv files, python scripts to run the Sentaurus device simulations and analyze the data

Python scripts have description inside them on how to use them

Commands:
Tool Sentaurus Structure editor: sde - to make the device- sde -e <cmd file>
Or copy- paste the commands in the command window after opening sde
Once the device is made, Build mesh - to obtain tdr. Tdr will be used to run sdevice simulation

sdevice <cmd file> - to run simulation
svisual & - to view the device
inspect & - to view current or transient plots

Scripts written by me to automate
Python_generate_sdevice_runsim.py or python_current.py needs to be copied in every folder where the sdevice command files need to be generated. It takes a template file as input and a csv file having different parameters as another input. It generates sdev files and runs sim
Python_runboth.py - combines both python_post-process_250p_limit.py and python_combine_2csv.py. The first one extracts charge values from the plt files. The second one, combines the input csv file and this charge values column by column.
Or copy- paste the commands in the command window after opening sde
Once the device is made, Build mesh - to obtain tdr. Tdr will be used to run sdevice simulation

Contact me at: nanditha@ee.iitb.ac.in (available temporarily) or at nanditha.ec@gmail.com Dept of EE, IIT Bombay, Mumbai, India

Experiment data files

This data is associated with the following publication:

Quantification of the likelihood of single event multiple transients in logic circuits in bulk CMOS technology

Published in: Microelectronics Journal

Latest version

  • Version 1

    2018-01-04

    Published: 2018-01-04

    DOI: 10.17632/yx9npcvnw8.1

    Cite this dataset

    Rao, Nanditha; Desai, Madhav P (2018), “Data for: Quantification of the likelihood of single event multiple transients in logic circuits in bulk CMOS technology”, Mendeley Data, v1 http://dx.doi.org/10.17632/yx9npcvnw8.1

Categories

Semiconductors, Software Error Handling, Device Modeling

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Licence

CC BY NC 3.0 Learn more

The files associated with this dataset are licensed under a Attribution-NonCommercial 3.0 Unported licence.

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You are free to adapt, copy or redistribute the material, providing you attribute appropriately and do not use the material for commercial purposes.

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